The UAA2067G is a low-power transceiver intended for use in portable and base station transceivers complying with the DECT system. The IC performs in accordance with specifications in the -30 to +85°C temperature range.
The UAA2067G contains a front-end receiver for the 1800 to 1900 MHz frequency range, a high-frequency VCO for the 1650 to 1850 MHz range, a low-frequency VCO for the 100 to 140 MHz frequency range and a transmitter with a high-output power amplifier driver stage for the 1800 to 1900 MHz frequency range. Designed in an advanced BiCMOS process, it combines high performance with low-power consumption and a high degree of integration, thus reducing external component costs and total radio size.
Its first advantage is to provide typically 34 dB of image rejection in the receiver path. Thus, the image filter between the LNA and the mixer is redundant and consequently can be removed. The receive section consists of a low-noise amplifier that drives a quadrature mixer pair. Image rejection is achieved by this RF mixer pair and the two phase shifters in the I and Q channels that phase shift the IF by 45° and 135° respectively. The two phase shifted IFs are recombined and buffered to furnish the IF output signal.
Signals presented at the RF input at LO - IF frequency are rejected through this signal processing while signals at LO + IF frequency can form the IF signal.
Its second advantage is to provide a good buffered high-frequency VCO signal to the RX and TX mixers and to the synthesizer-prescaler. Switching the receive or transmit section on gives a very small change in VCO frequency.
Its third advantage is to provide a good buffered low-frequency VCO signal to the TX mixers, to the synthesizer-prescaler and the second down conversion mixer in a double conversion receiver. Switching the transmit section on gives a very small change in VCO frequency.
The frequency of each VCO is determined by a resonator network that is external to the IC. Each VCO has a regulated power supply voltage that has been designed specifically for minimizing a change in frequency due to changes in the power supply voltage, which may be caused for instance by switching on the power amplifier.
Its fourth advantage is to provide typically 33 dBc of image rejection in the single-sideband up-conversion mixer. Thus the image filter between the power amplifier and the antenna is redundant and may consequently be removed. Image rejection is achieved in the internal architecture by two RF mixers in quadrature and two phase shifters in the low-frequency VCO signal that shifts the phase to 0° and 90°. The output signals of the mixers are summed to form the single-upper-sideband output signal.
The output stage is a high-level output buffer with an output power of approximately 4 dBm. The output level is sufficient to drive a three-stage bipolar preamplifier for DECT.
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